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Q. The diagram of a logic circuit is given below
image The output $F$ of the circuit is represented by:

AFMCAFMC 2002

Solution:

The circuit consists of 2 OR gates and 1 AND. gate.
Output of upper OR gate is $W+X$.
Output of lower OR gate is $W+Y$.
image
Net output is
$F =(W+X) \cdot(W+Y)$
$=W \cdot W+W Y+X W+X Y$
$=W+W Y+X W+X Y$
$=W(1+Y)+X W+X Y$
$=W+W X+X Y$
$=W(1+X)+X Y$
$F =W+X Y$