Tardigrade
Tardigrade - CET NEET JEE Exam App
Exams
Login
Signup
Tardigrade
Question
Physics
A logic gate whose output will be in logic 0 state only when all inputs are in logic 1 state is called
Question Error Report
Question is incomplete/wrong
Question not belongs to this Chapter
Answer is wrong
Solution is wrong
Answer & Solution is not matching
Spelling mistake
Image missing
Website not working properly
Other (not listed above)
Error description
Thank you for reporting, we will resolve it shortly
Back to Question
Thank you for reporting, we will resolve it shortly
Q. A logic gate whose output will be in logic 0 state only when all inputs are in logic 1 state is called
COMEDK
COMEDK 2010
Semiconductor Electronics: Materials Devices and Simple Circuits
A
AND
11%
B
OR
16%
C
NOR
21%
D
NAND
52%
Solution:
For $AND$ gate,$ Y = A.B = 1.1 = 1$
For $OR$ gate, $Y = A + B = 1 + 1 = 1$
For $NOR$ gate, $Y = \overline{ A + B} = \overline{1 + 1} =\overline{1} = 0$
Also $Y = \overline{1 + 0} = \overline{1} = 0$
For $NAND$ gate, $Y= \overline{A·B } =\overline{1 .1} = \overline{1} =0$